Instruction Set Extensions for Cryptographic Applications

نویسندگان

  • Sandro Bartolini
  • Roberto Giorgi
  • Enrico Martinelli
چکیده

Instruction-set extension (ISE) has been widely studied as a means to improve the performance of microprocessor devices running cryptographic applications. It consists, essentially, in endowing an existing processor with a set of additional instructions that can be useful for speeding-up specific cryptographic computations. Recently, researchers became aware of the following: ”The efficiency of an implementation algorithm often depends heavily on the details of the target platform, e.g., on the instruction set or the pipeline of a processor. Hence, theoretical complexity measures, such as the bit complexity, can be misleading in practice” ([48]). In this chapter, we will analyze the implications of designing and deploying an instruction-set extension for a microprocessor, we will give details on existing research proposals for various cryptographic applications, highlighting the associated benefits and limitations, and we will show the ISEs that are available in some market products and proposed in research studies.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Accelerating Cryptographic Protocols: A Review of Theory and Technologies

Modern cryptography applications require significant processing power and resources on computers. To make implementations of these algorithms comply with the rising requirements of speed and throughput of modern applications, the use of instruction set extensions and external cryptography processors has become more and more commonplace. While cryptography algorithms can and do differ significan...

متن کامل

Instruction Set Extensions for Efficient AES Implementation on 32-bit Processors

Secure communication over public networks like the Internet requires the use of cryptographic algorithms as basic building blocks. Most cryptographic workloads pose a considerable burden on devices like PDAs, cell phones, and sensor nodes, which are limited in processing power, memory and energy. In this paper we present an approach to increase the efficiency of 32-bit processors for handling s...

متن کامل

Side-Channel Protections for Cryptographic Instruction Set Extensions

Over the past few years, the microprocessor industry has introduced accelerated cryptographic capabilities through instruction set extensions. Although powerful and resistant to side-channel analysis such as cache and timing attacks, these instructions do not implicitly protect against power-based side-channel attacks, such as DPA. This paper provides a specific example with Intel’s AES-NI cryp...

متن کامل

ISEGEN: Adapting Kernighan-Lin Min-Cut Heuristic for Generation of Instruction Set Extensions

Customization of processor architectures through Instruction Set Extensions (ISEs) is an effective way to meet the growing performance demands of embedded applications. A high-quality ISE generation approach needs to obtain results close to those achieved by experienced designers, particularly for complex applications that exhibit regularity: expert designers are able to exploit manually such r...

متن کامل

CCproc: An Efficient Cryptographic Coprocessor

In this paper we introduce CCproc, a symmetric-key cryptographic (co)processor with a custom instruction set optimized for cryptographic applications. We study ten popular crypto algorithms, and provide custom solutions for them, while we also offer general support for future encryption algorithms. We design a custom but simple datapath able to execute the proposed instruction set and analyze i...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2009